I recently attended part of the RISC-V workshop at the Google campus. RISC-V is a fully open source CPU instruction set developed at UC Berkeley developed by Krste Asanovic, Andrew Waterman, and Yunsup Lee. An academic instruction set is all well and good, but the RISC-V spawned SiFive, which plans on building commercial processors using RISC-V. Can RISC-V and SiFive compete against ARM? More appropriately, can SiFive compete against smaller, agile proprietary players like Andes Technology, Synopsys, and Cortus? Unlike…Continue reading Can Open Source Processors Thrive?